2012s on Mika Tuupola

Lazy Load Bugfix Release

Fri, 03 Aug 2012 00:00:00 +0000

This version of Lazy Load is just a bugfix release. Minor release number bump is there because I pulled a new feature in last minute and I did not want to mess up my git branching. Bugfix usually does not normally warrant for the minor bump.

Bugs fixed

Plugin now works correctly when using many instances and they have different container.

$("#column-1 img").lazyload({ container: $("#column-1") });
$("#column-2 img").lazyload({ container: $("#column-2") });
$("#column-3 img").lazyload({ container: $("#column-3") });

Download

Latest source or minified. Plugin has been tested with Safari 5.1, Safari 6, Chrome 20, Firefox 12 on OSX and Chrome 20, IE 8 and IE 9 on Windows and Safari 5.1 on iOS 5 both iPhone and iPad.

Lazy Load 1.7.0 Released

Sat, 28 Jan 2012 00:00:00 +0000

Previous version of Lazy Load gained traction pretty fast. Good patches were submitted to GitHub. This version of plugin mostly concentrates on speed optimization and event handlers.

New Events

Two new events were added. Handler for appear event is called when image appears to viewport but before it is loaded. Handler for load event is called when image is loaded. Both event handler receive two parameters. First parameter elements_left is numbers of images left to load. Second parameter settings is the settings passed to Lazy Load plugin. Inside both handlers this refers to the image dom element.

$("img.lazy").lazyload({
    appear : function(elements_left, settings) {
        console.log(this, elements_left, settings);
    },
    load : function(elements_left, settings) {
        console.log(this, elements_left, settings);
    }
});

New Parameter

New parameter data_attribute was added. It allows custom naming of original image attribute.

$("img.lazy").lazyload({
data_attribute  : "kitten"
});

<img src="/img/placeholder.gif" data-kitten="/img/real-image.png" width="640" height="480" />

Renamed Parameter

Parameter effectspeed was renamed to effect_speed. Old version will work for couple of versions. This parameter has existed before but it was previously undocumented.

Selectors

Viewport selectors got tuned up. Internally they are used to determine when image appears on screen. Speed up is around 25%. You can compare speed tests of 1.6.0 and 1.7.0. While you’re at there click the Run tests button to help me collect better data. Some selector names were added and changed to match Viewport Selectors plugin.

$("img:in-viewport").something();
$("img:below-the-fold").something();
$("img:above-the-top").something();
$("img:left-of-screen").something();
$("img:right-of-screen").something();

Download

Latest source or minified. Plugin has been tested with Safari 5.1, Firefox 3.6, Firefox 7.0, Firefox 8.0 on OSX and Firefox 3.0, Chrome 14 and IE 8 on Windows and Safari 5.1 on iOS 5 both iPhone and iPad.

How to Use 595 Shift Register?

Mon, 02 Jan 2012 00:00:00 +0000

595 series shift registers come in many flavors. SN74HC595 is the most usual. TPIC6B595 is similar but can be used with more power hungry applications. Pin layouts are different but they all operate in the same way.

Shift register is controlled with three pins. They are usually called DATA, LATCH and CLOCK. Chip manufacturers have different names. See the table below for two examples from Texas Instruments.

	74HC595	TPIC6B595
DATA	SER	SER IN
LATCH	RCLK	RCK
CLOCK	SRCLK	SRCK

CLOCK is an constant high - low signal used to synchronize data transfer. Each time CLOCK goes high two things happen. Current value in shift register gets shifted left by one. Last bit is dropped out. First bit will be set to current value of DATA. To write a byte to shift register this has to happen eight times in a loop.

#define LATCH   B0
#define CLOCK   B1
#define DATA    B2

void shift_out(uint8_t data) {
    for(uint8_t i = 0; i < 8; i++) {
        /* Write bit to data port. */
        if (0 == (data & _BV(7 - i))) {
            digital_write(DATA, LOW);
        } else {
            digital_write(DATA, HIGH);
        }

        /* Pulse clock input to write next bit. */
        digital_write(CLOCK, LOW);
        digital_write(CLOCK, HIGH);
    }
}

After calling shift_out() the shift register internally contains new value. To update output pins you must pull LATCH high. This is sometimes called latching on pulsing the latch. Note that it is not enough to hold LATCH high. Data transfer happens on transition from low to high. This is also called rising edge. Code for a led binary counter from 0 to 65535 would look like the following:

int main(void) {

    for(uint16_t i = 0; i < 0xffff; i++) {
        /* Shift high byte first to shift registers. */
        shift_out(i >> 8);
        shift_out(i & 0xff);

        /* Pulse latch to transfer data from shift registers */
        /* to storage registers. */
        digital_write(LATCH, LOW);
        digital_write(LATCH, HIGH);

        _delay_ms(50);
    }

    return 0;
}

The technique above is called bit banging. Bit banging is a technique for serial communications using software instead of dedicated hardware. Good thing is it is cheap to implement. Bad thing is it wastes processing time. Luckily most AVR chips provide an alternative.

Serial Peripheral Interface Bus

The Serial Peripheral Interface Bus or SPI is a synchronous serial data connection. It provides hardware implementation of the clock pulse and writing data serially. SPI terminology differs from bit banging a bit. You can use SPI with three pins only. If you also want to read value back from the slave device you must use fourth pin. This is what MISO is used for.

Bit Bang	SPI	Description
DATA	MOSI	Master Out Slave In
LATCH	SS	Slave Select
CLOCK	SCLK	Serial Clock
-	MISO	Master In Slave Out

Before you can use SPI it must be configured. Main things to do are setting the device to work as master and the data order. Most of the time this is enough. Configuration is done by setting the appropriate bit in the SPI Control Register SPCR. For all configurable options see the Control and Status Registers table. When using SPI you cannot use any arbitrary pins. Instead read your datasheet to find out which pins your microcontroller uses for SPI. Values below are for ATmega32U4 which is used in both Adafruit ATmega32U4 Breakout Board and Teensy USB Development Board.

#define SS   B0
#define SCLK B1
#define MOSI B2
#define MISO B3

void spi_init(void) {
    pin_mode(SCLK, OUTPUT);
    pin_mode(MOSI, OUTPUT);
    pin_mode(SS, OUTPUT); /* Should be output in Master mode. */

    SPCR &= ~(_BV(DORD)); /* MSB first. */
    SPCR |= _BV(MSTR);    /* Act as master. */
    SPCR |= _BV(SPE);     /* Enable SPI. */
}

After SPI is configured reading and writing to it is easy. When byte is written to SPI Data Register SPDR it will be transmitted to slave. Received bytes (if any) are written to hardware receive buffer. Reading SPDR will return the data in receive buffer.

uint8_t spi_transfer(volatile uint8_t data) {
    SPDR = data;
    loop_until_bit_is_set(SPSR, SPIF);
    return SPDR;
}

Why spi_transfer() and not separate spi_read() and spi_write() functions? Internally both master and slave are 8-bit shift registers (do not confuse this with the TPIC6B595 shift register used in article). One bit is shifted from the master to the slave and from the slave to the master simultaneously in one serial clock cycle. After eight SLCK pulses data has been exchanged between master and slave. Slave never sends data to master by itself. Master always must write something to slave.

Main program is essentially the same as when using shift_out() function. Since we do not read anything back we can just ignore return value of spi_transfer() call.

int main(void) {

    spi_init();

    for(uint16_t i = 0; i < 0xffff; i++) {
        /* Shift high byte first to shift registers. */
        spi_transfer(i >> 8);
        spi_transfer(i & 0xff);

        /* Pulse latch to transfer data from shift registers */
        /* to storage registers. */
        digital_write(SPI_SS, LOW);
        digital_write(SPI_SS, HIGH);
    }

    return 0;
}

Control and Status Registers

SPCR Bit #	Name	Description
bit 7	`SPIE`	SPI Interrupt Enable.
bit 6	`SPE`	SPI Enable. When set hardware SPI operations will be enabled.
bit 5	`DORD`	Data Order. When set LSB will be transmitted first.
bit 4	`MSTR`	Master / Slave Select. When set device will act as SPI master.
bit 3	`CPOL`	Clock Polarity. When set leading edge will be falling and trailing edge rising. Vice versa when unset.
bit 2	`CPHA`	Clock Phase. When set data will be sampled on trailing edge of the clock. Vice versa when unset.
bit 1 bit 0	`SPR1` `SPR0`	SPI Clock Rate Select 1 and 0. Used together with `SPI2X` to set the `SCK` frequency.

SPSR Bit #	Name	Description
bit 7	`SPIF`	SPI Interrupt Flag. Set when a serial transfer is complete. An interrupt is generated if `SPIE` in `SPCR` is set and global interrupts are enabled. Cleared by hardware when interrupt handling vector is executed.
bit 6	`WCOL`	Write Collision Flag. Set if the `SPDR` is written during a data transfer.
bit 5 bit 4 bit 3 bit 2 bit 1		Reserved. Always zero.
bit 0	`SPI2X`	Double SPI Speed. Used together with `SPR1` and `SPR0` to set the `SCK` frequency.

SPI2X	SPR1	SPR0	SCK Frequency
0	0	0	f_osc/4
0	0	1	f_osc/16
0	1	0	f_osc/64
0	1	1	f_osc/128
1	0	0	f_osc/2
1	0	1	f_osc/8
1	1	0	f_osc/32
1	1	1	f_osc/64

Wiring TPIC6B595

Wiring is pretty straight forward but depends on the chip used. TPIC6B595 from Adafruit was used when writing this article.

All shift registers should share CLOCK and LATCH signals. When cascading more than one shift register DATA is redirected to next register by connecting SER OUT to SER IN. Outputs are connected to corresponding leds. To enable outputs of TPIC6B595 you must also tie SRCLR pin to positive voltage and G pin to ground.

In image below CLOCK is blue, LATCH is yellow and DATA is orange.

2012s on Mika Tuupola

Lazy Load Bugfix Release

Bugs fixed

Download

Lazy Load 1.7.0 Released

New Events

New Parameter

Renamed Parameter

Selectors

Download

How to Use 595 Shift Register?

Serial Peripheral Interface Bus

Control and Status Registers

Wiring TPIC6B595

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